When you rely on conduction through the board for cooling, you need to capture the details

This is why SolariaPCB imports ODB++ data.  It includes everything needed to accurately thermally simulate conduction in the board.  But what would you do if your results looked like this?  You would call the software developer to report a bug.

What could create these isothermal blocks?  So you look at the metal layers.  Below is one of the seven identical metal layers in the board.  Wow! Thats a lot of copper, probably 95% copper.

So you look a little closer at the boxed area shown above.  There are 0.025" gaps between the copper areas.  All seven layers are identical so the gaps are aligned.  Component heat within each of these copper islands must conduct across 0.025" of dielectric material.  The thermal conductivity of the dielectric material is over 1000 times smaller than that of copper.  Though the gap is small, it creates quite a thermal break.

Below is an unfilled view of the layer.

Below the metal layer is overlaid over the temperature contour showing exact alignment.

No software bugs, just accurate simulation of the metal layers.


Below shows board and component temperatures

A common smear method was next used to simulate the metal layers.  Instead of processing the layer traces, an estimate of the amount of copper for each layer was entered.

A new Solaria model was built by SolariaPCB using this smeared technique.  The model was then solved giving the following results.  As expected, the thermal breaks in the layers were not accounted for resulting in significantly lower temperatures.  If SolariaPCB was not used, this board would have been deamed acceptable and overheated in the field.

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